Tritium turns ternary language-model weights into an edge inference stack

Field notes

The project stores each ternary weight row as positive and negative bit planes, with a 16-byte beat representing 64 columns. That layout is intended to pass unchanged from page cache to CPU SIMD kernels and then to RTL, while an independent simulator serves as the comparison oracle. The listed crates cover checkpoint conversion, the transformer and KV cache, CPU execution, a host daemon with C ABI, and hardware-in-the-loop support. The page reports exact integer agreement as a design constraint.