Observed arrival · 2026-09-22
Noetic’s state-by-state silicon
Noetic is developing workflow-specific ASICs for scientific and engineering simulation, using fixed-state computational models.
- For
- Simulation engineers and hardware architects
- Worth noticing
- A browser illustration runs a four-word state model through the same seven operations on every step.
Field notes
The homepage separates four initial benchmark areas—heat flow, plasma physics, photonics, and quantitative biology—from a wider application list. Its central demonstration is explicitly illustrative rather than a Noetic ISA: a four-word state is updated through seven repeated operations, including fixed decay and averaging. The proposed build sequence runs from workload selection and model quantization to architecture, RTL, verification, physical design, software, and benchmarks. The site says measurement is still in development.
Observed signals
Read the marks
Editorial observations of this landing page, not a rating.
One card from the complete issue