Observed arrival · 2026-11-01
cloudbust: one register map, many outputs
A browser-based tool for turning a hardware register map into VHDL, testbenches, software headers, and documentation.
- For
- FPGA and ASIC designers managing register maps
- Worth noticing
- The listed bus endpoints cover six interfaces, including AXI4-Lite, Avalon-MM, APB, Wishbone, IPbus, and SBI.
Field notes
The editor accepts manually entered registers and fields or a bust JSON file, checks edits as they happen, and updates generated files and documentation before a ZIP download. The listed bus endpoints cover AXI4-Lite, Avalon-MM, APB, Wishbone, IPbus, and SBI; outputs also include a self-checking UVVM testbench and C, C++, and Python headers. The site says its Pyodide-based static implementation keeps maps in the browser; its free hosted version is limited to eight registers, while the underlying open-source package has no limit.
Observed signals
Read the marks
Editorial observations of this landing page, not a rating.
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